MEASURED INTERRUPT TO USER PROCESS LATENCIES
The interrupt to process latency reflects the measured interval that a usermode process needed to respond to a hardware request from the moment the interrupt service routine started execution. This includes the scheduling and execution of a DPC routine, the signaling of an event and the waking up of a usermode thread from an idle wait state in response to that event.
Highest measured interrupt to process latency (µs): 171,688601
Average measured interrupt to process latency (µs): 3,010099
Highest measured interrupt to DPC latency (µs): 156,103772
Average measured interrupt to DPC latency (µs): 0,818389
REPORTED ISRs
Interrupt service routines are routines installed by the OS and device drivers that execute in response to a hardware interrupt signal.
Highest ISR routine execution time (µs): 141,149451
Driver with highest ISR routine execution time: dxgkrnl.sys - DirectX Graphics Kernel, Microsoft Corporation
Highest reported total ISR routine time (%): 0,159039
Driver with highest ISR total time: dxgkrnl.sys - DirectX Graphics Kernel, Microsoft Corporation
Total time spent in ISRs (%) 0,166903
ISR count (execution time <250 µs): 130755
ISR count (execution time 250-500 µs): 0
ISR count (execution time 500-999 µs): 0
ISR count (execution time 1000-1999 µs): 0
ISR count (execution time 2000-3999 µs): 0
ISR count (execution time >=4000 µs): 0
REPORTED DPCs
DPC routines are part of the interrupt servicing dispatch mechanism and disable the possibility for a process to utilize the CPU while it is interrupted until the DPC has finished execution.
Highest DPC routine execution time (µs): 252,773204
Driver with highest DPC routine execution time: tcpip.sys - Pilote TCP/IP, Microsoft Corporation
Highest reported total DPC routine time (%): 0,038161
Driver with highest DPC total execution time: dxgkrnl.sys - DirectX Graphics Kernel, Microsoft Corporation
Total time spent in DPCs (%) 0,141445
DPC count (execution time <250 µs): 331114
DPC count (execution time 250-500 µs): 0
DPC count (execution time 500-999 µs): 1
DPC count (execution time 1000-1999 µs): 0
DPC count (execution time 2000-3999 µs): 0
DPC count (execution time >=4000 µs): 0
REPORTED HARD PAGEFAULTS
Hard pagefaults are events that get triggered by making use of virtual memory that is not resident in RAM but backed by a memory mapped file on disk. The process of resolving the hard pagefault requires reading in the memory from disk while the process is interrupted and blocked from execution.
Process with highest pagefault count: chrome.exe
Total number of hard pagefaults 81
Hard pagefault count of hardest hit process: 39
Highest hard pagefault resolution time (µs): 966,205589
Total time spent in hard pagefaults (%): 0,002231
Number of processes hit: 5